Heterogeneous Integration and Fabrication of III-V MOS Devices in a 200mm Processing Environment
نویسندگان
چکیده
منابع مشابه
4.4 Fabrication of III-V virtual Substrate on 200 mm Silicon for III-V and Si Devices Integration
We present the hetero-epitaxy of III-V materials on 200 mm Silicon wafers by MOCVD. A Ge layer is first grown on the silicon wafer by a two-step process, allowing a lattice matched GaAs layer to be grown on top. Anti-phase boundaries formation are avoided by using a high growth temperature and an arsine partial pressure above 5 mbar during the nucleation of the GaAs layer. The resulting GaAs vi...
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ژورنال
عنوان ژورنال: ECS Transactions
سال: 2019
ISSN: 1938-6737
DOI: 10.1149/1.3569922